Laura I. Galindez Olascoaga

Laura I. Galindez Olascoaga

Postdoctoral researcher at UC Berkeley. Working on probabilistic models, hyperdimensional computing and closed loop intelligence for energy constrained applications.

About me

I am a postdoc at the Berkeley Wireless Research Center of UC Berkeley, working under the supervision of Prof. Jan Rabaey. My research focuses on the development of hybrid cognitive systems that enable reasoning across the levels of abstraction of an application, while remaining aware of the resource constraints of the involved devices. In particular, my current work relies on the integration of probabilistic inference, high-dimensional computing and hardware-aware machine learning.

Before joining UC Berkeley, I obtained my PhD from KU Leuven under the supervision of Prof. Marian Verhelst. My dissertation proposed hardware-aware probabilistic models and algoritmic strategies targeting resource scarce applications. During the winter of 2018, I was a visiting scholar at the Statistical and Relational Artificial Intelligence Lab (StarAI) in UCLA, where I worked with Prof. Guy Van den Broeck.

I received my Master’s degree in Systems and Control from the Mechanical Engineering Department of TU Eindhoven in The Netherlands, and my Bachelor’s degree in Mechatronics Engineering from Tecnológico de Monterrey in Mexico.

Interests

  • Resource-aware and hardware-aware machine learning
  • Tractable probabilistic models, especially Probabilistic Circuits
  • Hyperdimensional (HD) computing or Vector Symbolic Architectures (VSAs)
  • Human Robot Interaction

News

  • Februrary 2021: We are presenting our work on A Brain-Inspired Hierarchical Reasoning Framework for Cognition-Augmented Prosthetic Grasping at the First International Workshop on Combining Learning and Reasoning during AAAI 2022.
  • December 2021: We presented our work at the Women in Machine Learning Workshop at NeurIPS 2021, entitled Exploiting Hyperdimensional Computing and Probabilistic Inference for Reasoning Across Levels of Abstraction in Dynamic Biosignal-Based Applications.
  • May 2021: Springer just published my book Hardware-Aware Probabilistic Machine Learning Models, based on my PhD thesis.
  • February 2021: Our work 9.4 PIU: A 248GOPS/W Stream-Based Processor for Irregular Probabilistic Inference Networks Using Precision-Scalable Posit Arithmetic in 28nm, co-authored with Nimish Shah, Wannes Meert, Shirui Zhao and Marian Verhelst was presented at the International Solid State Circuits Conference (ISSCC2021).
  • November 2020: Defended my PhD dissertation on Hardware-Aware Probabilistic Models: Learning Inference and Use Cases!
  • June 2020: Presented our work on , Dynamic complexity tuning for hardware-aware probabilistic circuits, at the IoT, Edge, and Mobile for Embedded Machine Learning during EMCL-PKDD 2020.
  • January 2020: Our paper, Discriminative Bias for Learning Probabilistic Sentential Decision Diagrams, co-authored with Wannes Meert, Nimish Shah, Guy Van den Broeck and Marian Verhelst has been accepted at the Symposium on Intelligent Data Analysis 2020.
  • December 2019: Together with Antonio Vergari from UCLA, gave a talk on our joint project on Deep arithmetic networks for efficient learning, inference and decision making during the Probabilistic Computing ISTC Annual Workshop at Intel Santa Clara.
  • November 2019: Our paper, Acceleration of probabilistic reasoning through custom processor architecture and compiler, co-authored with Nimish Shah, Wannes Meert and Marian Verhelst has been accepted at the Design, Automation and Test in Europe conference 2020.
  • October 2019: Our paper, On hardware-aware probabilistic frameworks for resource constrained embdded applications, co-authored with Wannes Meert, Nimish Shah, Marian Verhelst and Guy Van den Broeck has been accepted at the NeurIPS 2019 Energy Efficient Machine Learning workshop.
  • September 2019: Our paper, Towards Hardware-Aware Tractable Learning of Probabilistic Models, co-authored with Wannes Meert, Nimish Shah, Marian Verhelst and Guy Van den Broeck has been accepted at NeurIPS 2019.
  • August 2019: Nimish Shah presented our work, PRU: Probabilistic Reasoning processing Unit for resource-efficient AI , at Hot Chips 2019.
  • November 2018: Our paper, Dynamic Sensor-Frontend Tuning for Resource Efficient Embedded Classification, co-authored with Komail Badami, Jonas Vlasselaer, Wannes Meert and Marian Verhelst has been published in the proceedings of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems.